On Fri, Jan 20, 2017 at 01:13:48PM +0000, Chris Wilson wrote: > On Fri, Jan 20, 2017 at 10:15:09AM +0000, Chris Wilson wrote: > > GT interrupts are very, very frequent as they are used for submitting > > every request to the hardware (thanks be to execlists). Given their > > prevalence and the comparity rarity of display interrupts, if we do > > receive an IRQ and we process a GT interrupt skip the *unconditional* > > checking of the display pipes. > > > > This gives a 20% improvement in *walltime* of GEM execution tests on my > > Braswell nuc. > > Ignoring the fact that this patch missed an interrupt and so is fubar, > 10% of that walltime improvement actually came from latency reductions > elsewhere, I compared against the wrong baseline. + if (iir & (PIPE_EVENT_A | ...)) valleyview_pipestar_irq_ack(...); should be the simple way to avoid looking for display interrupts when processing just GT interrupts. But it would mean losing underrun detection when only GT interrupts are occurring. But perhaps it'si still a worthwile tradeoff to make? -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
