>-----Original Message----- >From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx] >Sent: Thursday, December 22, 2016 3:30 PM >To: Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx> >Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Alex Dai <yu.dai@xxxxxxxxx>; Peter Antoine ><peter.antoine@xxxxxxxxx> >Subject: Re: [PATCH 7/8] drm/i915/huc: Support HuC authentication > >On Thu, Dec 22, 2016 at 03:12:23PM -0800, Anusha Srivatsa wrote: >> +void intel_guc_auth_huc(struct drm_i915_private *dev_priv) { >> + struct intel_guc *guc = &dev_priv->guc; >> + struct intel_huc *huc = &dev_priv->huc; >> + struct i915_vma *vma; >> + int ret; >> + u32 data[2]; >> + >> + /* Bypass the case where there is no HuC firmware */ >> + if (huc->fw.fetch_status == INTEL_UC_FIRMWARE_NONE || >> + huc->fw.load_status == INTEL_UC_FIRMWARE_NONE) >> + return; >> + >> + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) { >> + DRM_ERROR("HuC: GuC fw wasn't loaded. Can't >authenticate\n"); >> + return; >> + } >> + >> + if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) { >> + DRM_ERROR("HuC: fw wasn't loaded. Nothing to >authenticate\n"); >> + return; >> + } >> + >> + vma = i915_gem_object_ggtt_pin(huc->fw.uc_fw_obj, NULL, 0, 0, 0); >> + if (IS_ERR(vma)) { >> + DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma)); >> + return; >> + } >> + >> + >> + /* Invalidate GuC TLB to let GuC take the latest updates to GTT. */ >> + I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE); > >Still working on stopping this from frequently popping up in code outside of the >GTT routines. So, basically beautify the code such that the GTT routines do not pop out in non GTT parts of code. Correct? > >> + /* Specify auth action and where public signature is. */ >> + data[0] = INTEL_GUC_ACTION_AUTHENTICATE_HUC; >> + data[1] = i915_ggtt_offset(vma) + huc->fw.rsa_offset; >> + >> + ret = intel_guc_send(guc, data, ARRAY_SIZE(data)); >> + if (ret) { >> + DRM_ERROR("HuC: GuC did not ack Auth request\n"); >> + goto out; >> + } >> + >> + /* Check authentication status, it should be done by now */ >> + ret = wait_for((I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED) > 0, >50); > >ret = intel_wait_for_register(dev_priv, > HUC_STATUS2, > HUC_FW_VERIFIED, > HUC_FW_VERIFIED, > 50); > >wait_for() is a rather large macro, and intel_wait_for_register() employs the spin >then sleep optimisation for quick responses. Thankyou for bringing this to my notice. Anusha >-Chris > >-- >Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
