Re: [PATCH 0/6] Introduce DP MST Topology state

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On Fri, Dec 30, 2016 at 8:09 AM, Dhinakaran Pandiyan
<dhinakaran.pandiyan@xxxxxxxxx> wrote:
> Link bandwidth is shared between multiple display streams in DP MST
> configurations. The DP MST topology manager structure maintains the shared
> link bandwidth for a primary link directly connected to the GPU. For atomic
> modesetting drivers, checking if there is sufficient link bandwidth for a
> mode needs to be done during the atomic_check phase to avoid failed
> modesets.
>
> Using the new helpers is optional and the changes should not affect
> drivers that don't support atomic modesetting.
>
> Patches 1-3/6 include cleanups and refactoring.
> Patch 4/6 adds the MST topology state, 5/6 adds helpers to alter the state
> and 6/6 contains i915 changes to use the helpers .
>
> Dhinakaran Pandiyan (6):
>   drm/dp: Store drm_device in MST topology manager
>   drm/dp: Kill unused MST vcpi slot availability tracking
>   drm/dp: Split drm_dp_mst_allocate_vcpi
>   drm/dp: Introduce DP MST topology manager state to track DP link bw
>   drm/dp: Add DP MST helpers to atomically find and release vcpi slots
>   drm/i915/dp: Track available DP MST vcpi time slots

drm core changes always need to be submitted to dri-devel too, but
please keep intel-gfx for the entire set so that CI can test it. I.e.
you need to resubmit ...
-Daniel

>  drivers/gpu/drm/drm_atomic.c           | 66 +++++++++++++++++++++++++
>  drivers/gpu/drm/drm_atomic_helper.c    | 10 ++++
>  drivers/gpu/drm/drm_dp_mst_topology.c  | 89 ++++++++++++++++++++++++++--------
>  drivers/gpu/drm/i915/intel_display.c   | 39 ++++++++++++++-
>  drivers/gpu/drm/i915/intel_dp_mst.c    | 42 ++++++++++++++--
>  drivers/gpu/drm/i915/intel_drv.h       |  3 ++
>  drivers/gpu/drm/nouveau/nv50_display.c |  5 +-
>  drivers/gpu/drm/radeon/radeon_dp_mst.c |  5 +-
>  include/drm/drm_atomic.h               | 11 +++++
>  include/drm/drm_dp_mst_helper.h        | 35 ++++++++-----
>  10 files changed, 263 insertions(+), 42 deletions(-)
>
> --
> 2.7.4
>



-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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