Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > As the fence may be signaled concurrently from an interrupt on another > device, it is possible for the list of requests on the timeline to be > modified as we walk it. Take both (the context's timeline and the global > timeline) locks to prevent such modifications. > > Fixes: 80b204bce8f2 ("drm/i915: Enable multiple timelines") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Cc: <drm-intel-fixes@xxxxxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 2d736442c6ab..d94df127d9f6 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2725,6 +2725,7 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine) > struct drm_i915_gem_request *request; > struct i915_gem_context *incomplete_ctx; > struct intel_timeline *timeline; > + unsigned long flags; > bool ring_hung; > > if (engine->irq_seqno_barrier) > @@ -2768,13 +2769,20 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine) > if (i915_gem_context_is_default(incomplete_ctx)) > return; > > + timeline = i915_gem_context_lookup_timeline(incomplete_ctx, engine); > + > + spin_lock_irqsave(&engine->timeline->lock, flags); > + spin_lock(&timeline->lock); > + > list_for_each_entry_continue(request, &engine->timeline->requests, link) > if (request->ctx == incomplete_ctx) > reset_request(request); > > - timeline = i915_gem_context_lookup_timeline(incomplete_ctx, engine); > list_for_each_entry(request, &timeline->requests, link) > reset_request(request); > + > + spin_unlock(&timeline->lock); > + spin_unlock_irqrestore(&engine->timeline->lock, flags); > } > > void i915_gem_reset(struct drm_i915_private *dev_priv) > -- > 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx