From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
All the registers we care about should be the same for all
bdw+ platforms, so let's just use the bdw path for gen9+.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
tools/intel_display_poller.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 2129c613652d..63c930fb08a0 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -515,7 +515,7 @@ static void poll_dsl_deiir(uint32_t devid, int pipe, int bit,
bit = 1 << bit;
dsl = PIPE_REG(pipe, PIPEA_DSL);
- if (IS_GEN8(devid)) {
+ if (intel_gen(devid) >= 8) {
iir = GEN8_DE_PIPE_IIR(pipe);
ier = GEN8_DE_PIPE_IER(pipe);
imr = GEN8_DE_PIPE_IMR(pipe);
@@ -1152,7 +1152,7 @@ int main(int argc, char *argv[])
default:
usage(argv[0]);
}
- } else if (IS_GEN8(devid)) {
+ } else if (intel_gen(devid) >= 8) {
if (test_pixelcount)
usage(argv[0]);
--
2.10.2
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