Hi Dhinakaran, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.9-rc5 next-20161114] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Dhinakaran-Pandiyan/drm-dp-i915-Fix-DP-link-rate-math/20161115-055743 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-rhel (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): In file included from include/linux/cache.h:4:0, from include/linux/printk.h:8, from include/linux/kernel.h:13, from include/linux/list.h:8, from include/linux/kobject.h:20, from include/linux/device.h:17, from include/linux/i2c.h:30, from drivers/gpu/drm/i915/intel_dp.c:28: drivers/gpu/drm/i915/intel_dp.c: In function 'intel_dp_link_required': >> drivers/gpu/drm/i915/intel_dp.c:168:22: error: 'pixel_clk' undeclared (first use in this function) return DIV_ROUND_UP(pixel_clk * bpp, 8); ^ include/uapi/linux/kernel.h:12:40: note: in definition of macro '__KERNEL_DIV_ROUND_UP' #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) ^ drivers/gpu/drm/i915/intel_dp.c:168:9: note: in expansion of macro 'DIV_ROUND_UP' return DIV_ROUND_UP(pixel_clk * bpp, 8); ^~~~~~~~~~~~ drivers/gpu/drm/i915/intel_dp.c:168:22: note: each undeclared identifier is reported only once for each function it appears in return DIV_ROUND_UP(pixel_clk * bpp, 8); ^ include/uapi/linux/kernel.h:12:40: note: in definition of macro '__KERNEL_DIV_ROUND_UP' #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) ^ drivers/gpu/drm/i915/intel_dp.c:168:9: note: in expansion of macro 'DIV_ROUND_UP' return DIV_ROUND_UP(pixel_clk * bpp, 8); ^~~~~~~~~~~~ drivers/gpu/drm/i915/intel_dp.c:169:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ vim +/pixel_clk +168 drivers/gpu/drm/i915/intel_dp.c 22 * 23 * Authors: 24 * Keith Packard <keithp@xxxxxxxxxx> 25 * 26 */ 27 > 28 #include <linux/i2c.h> 29 #include <linux/slab.h> 30 #include <linux/export.h> 31 #include <linux/notifier.h> 32 #include <linux/reboot.h> 33 #include <drm/drmP.h> 34 #include <drm/drm_atomic_helper.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_crtc_helper.h> 37 #include <drm/drm_edid.h> 38 #include "intel_drv.h" 39 #include <drm/i915_drm.h> 40 #include "i915_drv.h" 41 42 #define DP_LINK_CHECK_TIMEOUT (10 * 1000) 43 44 /* Compliance test status bits */ 45 #define INTEL_DP_RESOLUTION_SHIFT_MASK 0 46 #define INTEL_DP_RESOLUTION_PREFERRED (1 << INTEL_DP_RESOLUTION_SHIFT_MASK) 47 #define INTEL_DP_RESOLUTION_STANDARD (2 << INTEL_DP_RESOLUTION_SHIFT_MASK) 48 #define INTEL_DP_RESOLUTION_FAILSAFE (3 << INTEL_DP_RESOLUTION_SHIFT_MASK) 49 50 struct dp_link_dpll { 51 int clock; 52 struct dpll dpll; 53 }; 54 55 static const struct dp_link_dpll gen4_dpll[] = { 56 { 162000, 57 { .p1 = 2, .p2 = 10, .n = 2, .m1 = 23, .m2 = 8 } }, 58 { 270000, 59 { .p1 = 1, .p2 = 10, .n = 1, .m1 = 14, .m2 = 2 } } 60 }; 61 62 static const struct dp_link_dpll pch_dpll[] = { 63 { 162000, 64 { .p1 = 2, .p2 = 10, .n = 1, .m1 = 12, .m2 = 9 } }, 65 { 270000, 66 { .p1 = 1, .p2 = 10, .n = 2, .m1 = 14, .m2 = 8 } } 67 }; 68 69 static const struct dp_link_dpll vlv_dpll[] = { 70 { 162000, 71 { .p1 = 3, .p2 = 2, .n = 5, .m1 = 3, .m2 = 81 } }, 72 { 270000, 73 { .p1 = 2, .p2 = 2, .n = 1, .m1 = 2, .m2 = 27 } } 74 }; 75 76 /* 77 * CHV supports eDP 1.4 that have more link rates. 78 * Below only provides the fixed rate but exclude variable rate. 79 */ 80 static const struct dp_link_dpll chv_dpll[] = { 81 /* 82 * CHV requires to program fractional division for m2. 83 * m2 is stored in fixed point format using formula below 84 * (m2_int << 22) | m2_fraction 85 */ 86 { 162000, /* m2_int = 32, m2_fraction = 1677722 */ 87 { .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a } }, 88 { 270000, /* m2_int = 27, m2_fraction = 0 */ 89 { .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } }, 90 { 540000, /* m2_int = 27, m2_fraction = 0 */ 91 { .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } } 92 }; 93 94 static const int bxt_rates[] = { 162000, 216000, 243000, 270000, 95 324000, 432000, 540000 }; 96 static const int skl_rates[] = { 162000, 216000, 270000, 97 324000, 432000, 540000 }; 98 static const int default_rates[] = { 162000, 270000, 540000 }; 99 100 /** 101 * is_edp - is the given port attached to an eDP panel (either CPU or PCH) 102 * @intel_dp: DP struct 103 * 104 * If a CPU or PCH DP output is attached to an eDP panel, this function 105 * will return true, and false otherwise. 106 */ 107 static bool is_edp(struct intel_dp *intel_dp) 108 { 109 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 110 111 return intel_dig_port->base.type == INTEL_OUTPUT_EDP; 112 } 113 114 static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp) 115 { 116 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 117 118 return intel_dig_port->base.base.dev; 119 } 120 121 static struct intel_dp *intel_attached_dp(struct drm_connector *connector) 122 { 123 return enc_to_intel_dp(&intel_attached_encoder(connector)->base); 124 } 125 126 static void intel_dp_link_down(struct intel_dp *intel_dp); 127 static bool edp_panel_vdd_on(struct intel_dp *intel_dp); 128 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); 129 static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp); 130 static void vlv_steal_power_sequencer(struct drm_device *dev, 131 enum pipe pipe); 132 static void intel_dp_unset_edid(struct intel_dp *intel_dp); 133 134 static int 135 intel_dp_max_link_bw(struct intel_dp *intel_dp) 136 { 137 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; 138 139 switch (max_link_bw) { 140 case DP_LINK_BW_1_62: 141 case DP_LINK_BW_2_7: 142 case DP_LINK_BW_5_4: 143 break; 144 default: 145 WARN(1, "invalid max DP link bw val %x, using 1.62Gbps\n", 146 max_link_bw); 147 max_link_bw = DP_LINK_BW_1_62; 148 break; 149 } 150 return max_link_bw; 151 } 152 153 static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) 154 { 155 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 156 u8 source_max, sink_max; 157 158 source_max = intel_dig_port->max_lanes; 159 sink_max = drm_dp_max_lane_count(intel_dp->dpcd); 160 161 return min(source_max, sink_max); 162 } 163 164 static int 165 intel_dp_link_required(int pixel_clock, int bpp) 166 { 167 /* pixel_clock is in kHz, divide bpp by 8 for bit to Byte conversion */ > 168 return DIV_ROUND_UP(pixel_clk * bpp, 8); 169 } 170 171 static int --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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