From: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> i915.enable_slpc is used to override the default for slpc usage. The expected values are -1=auto, 0=disabled [default], 1=enabled. slpc_enable_sanitize() converts i915.enable_slpc to either 0 or 1. Interpretation of default value is based on HAS_SLPC(), after slpc_version_check(). This function also enforces the requirement that guc_submission is required for slpc. intel_slpc_enabled() returns 1 if SLPC should be used. v1: Add early call to sanitize enable_slpc in intel_guc_ucode_init Remove sanitize enable_slpc call before firmware version check is performed. (ChrisW) Version check is added in next patch and that will be done as part of slpc_enable_sanitize function in the next patch. (Sagar) Updated slpc option sanitize function call for platforms without GuC support. This was caught by CI BAT. v2: Changed parameter to dev_priv for HAS_SLPC macro. (David) Code indentation based on checkpatch. v3: Rebase. v4: Moved sanitization of SLPC option post GuC load. v5: Removed function intel_slpc_enabled. Planning to rely only on kernel parameter. Moved sanitization prior to GuC load to use the parameter during SLPC state setup during to GuC load. (Sagar) Suggested-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_params.c | 6 ++++++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_guc_loader.c | 24 +++++++++++++++++++++--- 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 629e433..70f07ee 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -36,6 +36,7 @@ struct i915_params i915 __read_mostly = { .enable_dc = -1, .enable_fbc = -1, .enable_execlists = -1, + .enable_slpc = 0, .enable_hangcheck = true, .enable_ppgtt = -1, .enable_psr = -1, @@ -140,6 +141,11 @@ struct i915_params i915 __read_mostly = { "Override execlists usage. " "(-1=auto [default], 0=disabled, 1=enabled)"); +module_param_named_unsafe(enable_slpc, i915.enable_slpc, int, 0400); +MODULE_PARM_DESC(enable_slpc, + "Override single-loop-power-controller (slpc) usage. " + "(-1=auto, 0=disabled [default], 1=enabled)"); + module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); MODULE_PARM_DESC(enable_psr, "Enable PSR " "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 94efc89..ed37a6f 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -39,6 +39,7 @@ struct i915_params { int enable_fbc; int enable_ppgtt; int enable_execlists; + int enable_slpc; int enable_psr; unsigned int preliminary_hw_support; int disable_power_well; diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 34d6ad2..8a23154 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -161,6 +161,21 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv) } } +void sanitize_slpc_option(struct drm_i915_private *dev_priv) +{ + /* slpc requires hardware support and compatible firmware */ + if (!HAS_SLPC(dev_priv)) + i915.enable_slpc = 0; + + /* slpc requires guc loaded */ + if (!i915.enable_guc_loading) + i915.enable_slpc = 0; + + /* slpc requires guc submission */ + if (!i915.enable_guc_submission) + i915.enable_slpc = 0; +} + static u32 get_gttype(struct drm_i915_private *dev_priv) { /* XXX: GT type based on PCI device ID? field seems unused by fw */ @@ -761,16 +776,19 @@ void intel_guc_init(struct drm_device *dev) /* Early (and silent) return if GuC loading is disabled */ if (!i915.enable_guc_loading) - return; + goto out; if (fw_path == NULL) - return; + goto out; if (*fw_path == '\0') - return; + goto out; guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING; DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path); guc_fw_fetch(dev, guc_fw); /* status must now be FAIL or SUCCESS */ + +out: + sanitize_slpc_option(dev_priv); } /** -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx