Hi Jani, > -----Original Message----- > From: Jani Nikula [mailto:jani.nikula@xxxxxxxxxxxxxxx] > Sent: Thursday, November 10, 2016 6:37 PM > To: Yang, Libin <libin.yang@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx; > ville.syrjala@xxxxxxxxxxxxxxx; Vetter, Daniel <daniel.vetter@xxxxxxxxx>; > tiwai@xxxxxxx > Cc: Yang, Libin <libin.yang@xxxxxxxxx> > Subject: Re: [PATCH v2] drm/i915/audio: fix hdmi audio noise issue > > On Thu, 10 Nov 2016, libin.yang@xxxxxxxxx wrote: > > From: Libin Yang <libin.yang@xxxxxxxxx> > > > > Some monitors will have noise or even no sound after applying the > > patch 6014ac12. > > > > In patch 6014ac12, it will reset the cts value to 0 for HDMI. > > However, we need to disable Enable CTS or M Prog bit. This is the > > initial setting after HW reset. > > > > Fixes: 6014ac122ed0 ("drm/i915/audio: set proper N/M in modeset") > > Signed-off-by: Libin Yang <libin.yang@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_audio.c | 15 ++++++++++++--- > > 1 file changed, 12 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_audio.c > > b/drivers/gpu/drm/i915/intel_audio.c > > index 813fd74..a472d35 100644 > > --- a/drivers/gpu/drm/i915/intel_audio.c > > +++ b/drivers/gpu/drm/i915/intel_audio.c > > @@ -332,6 +332,13 @@ hsw_hdmi_audio_config_update(struct intel_crtc > *intel_crtc, enum port port, > > int n; > > u32 tmp; > > > > + /* reset CTS value to 0 */ > > + tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(pipe)); > > + tmp &= ~AUD_CONFIG_M_MASK; > > + tmp &= ~AUD_M_CTS_M_VALUE_INDEX; > > + tmp |= AUD_M_CTS_M_PROG_ENABLE; > > + I915_WRITE(HSW_AUD_M_CTS_ENABLE(pipe), tmp); > > + > > tmp = I915_READ(HSW_AUD_CFG(pipe)); > > tmp &= ~AUD_CONFIG_N_VALUE_INDEX; > > tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; > > @@ -351,10 +358,12 @@ hsw_hdmi_audio_config_update(struct intel_crtc > > *intel_crtc, enum port port, > > > > I915_WRITE(HSW_AUD_CFG(pipe), tmp); > > > > + /* > > + * Let's disable "Enable CTS or M Prog bit" > > + * and let HW calculate the value > > + */ > > tmp = I915_READ(HSW_AUD_M_CTS_ENABLE(pipe)); > > - tmp &= ~AUD_CONFIG_M_MASK; > > - tmp &= ~AUD_M_CTS_M_VALUE_INDEX; > > - tmp |= AUD_M_CTS_M_PROG_ENABLE; > > + tmp &= ~AUD_M_CTS_M_PROG_ENABLE; > > I915_WRITE(HSW_AUD_M_CTS_ENABLE(pipe), tmp); > > You did not address my review comment on the earlier version: > > Is it necessary to do the HSW_AUD_M_CTS_ENABLE updates in two places? > Why do you both enable and disable AUD_M_CTS_M_PROG_ENABLE bit here? Sorry, I missed your comments. The first doing the HSW_AUD_M_CTS_ENABLE is to reset the M value to 0. The second doing the HSW_AUD_M_CTS_ENABLE is to let HW calculate the M value. Or we can just try to disable the HSW_AUD_M_CTS_ENABLE bit. What's your opinion? Regards, Libin > > BR, > Jani. > > > > } > > -- > Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
