== Series Details == Series: series starting with [v2,01/11] drm/i915: Create distinct lockclasses for execution vs user timelines URL : https://patchwork.freedesktop.org/series/14926/ State : success == Summary == Series 14926v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/14926/revisions/1/mbox/ fi-bdw-5557u total:241 pass:226 dwarn:0 dfail:0 fail:0 skip:15 fi-bsw-n3050 total:241 pass:201 dwarn:0 dfail:0 fail:0 skip:40 fi-bxt-t5700 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28 fi-byt-j1900 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28 fi-byt-n2820 total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32 fi-hsw-4770 total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20 fi-hsw-4770r total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20 fi-ilk-650 total:241 pass:188 dwarn:0 dfail:0 fail:0 skip:53 fi-ivb-3520m total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22 fi-ivb-3770 total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22 fi-kbl-7200u total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22 fi-skl-6260u total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14 fi-skl-6700hq total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6700k total:241 pass:219 dwarn:1 dfail:0 fail:0 skip:21 fi-skl-6770hq total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14 fi-snb-2520m total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32 fi-snb-2600 total:241 pass:208 dwarn:0 dfail:0 fail:0 skip:33 44f80301cde325b9a33e594f8bec88f84e02fffa drm-intel-nightly: 2016y-11m-07d-12h-48m-36s UTC integration manifest 6716437 drm/i915: Support explicit fencing for execbuf 0ceaa08 drm/i915: Enable userspace to opt-out of implicit fencing e393102 drm/i915/scheduler: Support user-defined priorities 30873fa HACK drm/i915/scheduler: emulate a scheduler for guc ee261f83 drm/i915/scheduler: Boost priorities for flips ccad888 drm/i915/scheduler: Record all dependencies upon request construction 01edcb1 drm/i915/scheduler: Signal the arrival of a new request 82cefae drm/i915: Remove engine->execlist_lock 24066ba drm/i915: Defer transfer onto execution timeline to actual hw submission b464542 drm/i915: Split request submit/execute phase into two ce170b4 drm/i915: Create distinct lockclasses for execution vs user timelines == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2921/ _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
