During resume we will reset the SW/HW tracking for each ring head/tail pointers and so are not prepared to replay any pending requests (as opposed to GPU reset time). Add an assert for this. Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_lrc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index ee4aaf1..ae46345 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2158,6 +2158,8 @@ void intel_lr_context_resume(struct drm_i915_private *dev_priv) if (WARN_ON(IS_ERR(reg))) continue; + WARN_ON(!execlists_elsp_idle(engine)); + reg += LRC_STATE_PN * PAGE_SIZE / sizeof(*reg); reg[CTX_RING_HEAD+1] = 0; reg[CTX_RING_TAIL+1] = 0; -- 2.5.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
