== Series Details == Series: series starting with [01/12] drm/i915: Split request submit/execute phase into two URL : https://patchwork.freedesktop.org/series/14751/ State : success == Summary == Series 14751v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/14751/revisions/1/mbox/ fi-bdw-5557u total:241 pass:226 dwarn:0 dfail:0 fail:0 skip:15 fi-bsw-n3050 total:241 pass:201 dwarn:0 dfail:0 fail:0 skip:40 fi-byt-j1900 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28 fi-byt-n2820 total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32 fi-hsw-4770 total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20 fi-hsw-4770r total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21 fi-ilk-650 total:241 pass:187 dwarn:0 dfail:0 fail:0 skip:54 fi-ivb-3520m total:241 pass:218 dwarn:0 dfail:0 fail:0 skip:23 fi-ivb-3770 total:241 pass:218 dwarn:0 dfail:0 fail:0 skip:23 fi-kbl-7200u total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22 fi-skl-6260u total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14 fi-skl-6700hq total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6700k total:241 pass:219 dwarn:1 dfail:0 fail:0 skip:21 fi-skl-6770hq total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14 fi-snb-2520m total:241 pass:208 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:241 pass:207 dwarn:0 dfail:0 fail:0 skip:34 bf6b989af8b0fde56a352d9005c97b2d8e3bbbe3 drm-intel-nightly: 2016y-11m-02d-15h-44m-03s UTC integration manifest 164f390 drm/i915: Support explicit fencing for execbuf 9811cdb drm/i915: Enable userspace to opt-out of implicit fencing 4d35615 drm/i915/scheduler: Support user-defined priorities 675e7ea HACK drm/i915/scheduler: emulate a scheduler for guc 224c9f8 drm/i915/guc: Cache the client mapping b1c5a70 drm/i915/scheduler: Boost priorities for flips 2ad0f8b drm/i915/scheduler: Execute requests in order of priorities f2881be drm/i915/scheduler: Record all dependencies upon request construction c822ff5 drm/i915/scheduler: Signal the arrival of a new request b707ee3 drm/i915: Remove engine->execlist_lock 9943660 drm/i915: Defer transfer onto execution timeline to actual hw submission 332bc0d drm/i915: Split request submit/execute phase into two == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2894/ _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
