On Wed, Oct 26, 2016 at 03:41:35PM +0200, Maarten Lankhorst wrote: > Allow the driver to write watermarks during atomic evasion. > This will make it possible to write the watermarks in a cleaner > way on gen9+. > > intel_atomic_state is not used here yet, but will be used when > we program all watermarks as a separate step during evasion. > > This also writes linetime all the time, while before it was only > done during plane updates. This looks like this could be a bugfix, > but I'm not sure what it affects. > > Changes since v1: > - Add comment about atomic evasion to commit message. > - Unwrap I915_WRITE call. (Lyude) > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 6 ++++-- > drivers/gpu/drm/i915/intel_display.c | 20 +++++++++----------- > drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++-- > 3 files changed, 29 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 7a621c74254e..7a477d6a486e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -485,6 +485,7 @@ struct sdvo_device_mapping { > > struct intel_connector; > struct intel_encoder; > +struct intel_atomic_state; > struct intel_crtc_state; > struct intel_initial_plane_config; > struct intel_crtc; > @@ -498,8 +499,9 @@ struct drm_i915_display_funcs { > int (*compute_intermediate_wm)(struct drm_device *dev, > struct intel_crtc *intel_crtc, > struct intel_crtc_state *newstate); > - void (*initial_watermarks)(struct intel_crtc_state *cstate); > - void (*optimize_watermarks)(struct intel_crtc_state *cstate); > + void (*initial_watermarks)(struct intel_atomic_state *state, struct intel_crtc_state *cstate); > + void (*atomic_evade_watermarks)(struct intel_atomic_state *state, struct intel_crtc_state *cstate); Same drive by comment I gave before somewhere: That name is still super confusing. We're not trying to evade watermarks are we? -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx