On Thu, Oct 20, 2016 at 10:19:02PM +0100, Robert Bragg wrote: > @@ -1333,6 +1333,9 @@ int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv) > * 5. GPGPU dispatch compute indirect registers. > * 6. TIMESTAMP register and Haswell CS GPR registers > * 7. Allow MI_LOAD_REGISTER_REG between whitelisted registers. > + * 8. Don't report cmd_check() failures as EINVAL errors to userspace; > + * rely on the HW to NOOP disallowed commands as it would without > + * the parser enabled. I added a test case to exercise this and at least for OACONTROL we are fine. That test can supercede the negative BAT in gem_exec_parse. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
