Reviewed-by: Libin Yang <libin.yang@xxxxxxxxx> Regards, Libin > -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of > Jani Nikula > Sent: Monday, October 10, 2016 11:04 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Nikula, Jani <jani.nikula@xxxxxxxxx>; libin.yang@xxxxxxxxxxxxxxx; > Pandiyan, Dhinakaran <dhinakaran.pandiyan@xxxxxxxxx> > Subject: [PATCH RESEND 7/9] drm/i915/audio: add register macros > for audio config N value > > Have generic macros in line with the rest of the register bit definition macros > instead of a dedicated function in intel_audio.c, and use them. > No functional changes. > > Cc: Libin Yang <libin.yang@xxxxxxxxxxxxxxx> > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 ++++ > drivers/gpu/drm/i915/intel_audio.c | 23 ++++++----------------- > 2 files changed, 10 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h index acc767a52d8e..595d196f753f > 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7332,6 +7332,10 @@ enum { > #define AUD_CONFIG_UPPER_N_MASK (0xff << 20) > #define AUD_CONFIG_LOWER_N_SHIFT 4 > #define AUD_CONFIG_LOWER_N_MASK (0xfff << 4) > +#define AUD_CONFIG_N_MASK > (AUD_CONFIG_UPPER_N_MASK | AUD_CONFIG_LOWER_N_MASK) > +#define AUD_CONFIG_N(n) \ > + (((((n) >> 12) & 0xff) << AUD_CONFIG_UPPER_N_SHIFT) | \ > + (((n) & 0xfff) << AUD_CONFIG_LOWER_N_SHIFT)) > #define AUD_CONFIG_PIXEL_CLOCK_HDMI_SHIFT 16 > #define AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK (0xf << 16) > #define AUD_CONFIG_PIXEL_CLOCK_HDMI_25175 (0 << 16) > diff --git a/drivers/gpu/drm/i915/intel_audio.c > b/drivers/gpu/drm/i915/intel_audio.c > index 6aa619a84439..d2c6227f72b8 100644 > --- a/drivers/gpu/drm/i915/intel_audio.c > +++ b/drivers/gpu/drm/i915/intel_audio.c > @@ -135,20 +135,6 @@ static int audio_config_get_n(const struct > drm_display_mode *adjusted_mode, > return 0; > } > > -static uint32_t audio_config_setup_n_reg(int n, uint32_t val) -{ > - int n_low, n_up; > - uint32_t tmp = val; > - > - n_low = n & 0xfff; > - n_up = (n >> 12) & 0xff; > - tmp &= ~(AUD_CONFIG_UPPER_N_MASK | > AUD_CONFIG_LOWER_N_MASK); > - tmp |= ((n_up << AUD_CONFIG_UPPER_N_SHIFT) | > - (n_low << AUD_CONFIG_LOWER_N_SHIFT) | > - AUD_CONFIG_N_PROG_ENABLE); > - return tmp; > -} > - > static bool intel_eld_uptodate(struct drm_connector *connector, > i915_reg_t reg_eldv, uint32_t bits_eldv, > i915_reg_t reg_elda, uint32_t bits_elda, @@ - > 271,10 +257,13 @@ hsw_hdmi_audio_config_update(struct intel_crtc > *intel_crtc, enum port port, > if (adjusted_mode->crtc_clock == TMDS_296M || > adjusted_mode->crtc_clock == TMDS_297M) { > n = audio_config_get_n(adjusted_mode, rate); > - if (n != 0) > - tmp = audio_config_setup_n_reg(n, tmp); > - else > + if (n != 0) { > + tmp &= ~AUD_CONFIG_N_MASK; > + tmp |= AUD_CONFIG_N(n); > + tmp |= AUD_CONFIG_N_PROG_ENABLE; > + } else { > DRM_DEBUG_KMS("no suitable N value is found\n"); > + } > } > > I915_WRITE(HSW_AUD_CFG(pipe), tmp); > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
