Hi,
This is a small refactoring of the broxton ddi phy code that splits the
knowledge of each phy's configuration from the code itself and makes
the connection between the ports and the channels in the phy more
obvious.
I took the oppurtunity to move the code to intel_dpio_phy.c, since there
are a lot of similarities between the bxt and chv phys, as evidenced by
the documentation.
Thanks,
Ander
Ander Conselvan de Oliveira (9):
drm/i915: Rename struct i915_power_well field data to id
drm/i915: Explicitly map broxton DPIO power wells to phys
drm/i915: Pass lane count to bxt_ddi_phy_calc_lane_optmin_mask()
drm/i915: Move broxton phy code to intel_dpio_phy.c
drm/i915: Move DPIO phy documentation section to intel_dpio_phy.c
drm/i915: Move broxton vswing sequence to intel_dpio_phy.c
drm/i915: Create a struct to hold information about the broxton phys
drm/i915: Add location of the Rcomp resistor to bxt_ddi_phy_info
drm/i915: Address broxton phy registers based on phy and channel
number
Documentation/gpu/i915.rst | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 23 ++
drivers/gpu/drm/i915/i915_reg.h | 303 +++++-----------
drivers/gpu/drm/i915/intel_ddi.c | 362 +------------------
drivers/gpu/drm/i915/intel_dpio_phy.c | 597 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 84 +++--
drivers/gpu/drm/i915/intel_drv.h | 6 -
drivers/gpu/drm/i915/intel_runtime_pm.c | 145 ++++----
8 files changed, 821 insertions(+), 701 deletions(-)
--
2.5.5
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