On ti, 2016-09-20 at 09:29 +0100, Chris Wilson wrote: > @@ -143,88 +149,126 @@ static int render_state_setup(struct render_state *so) > } > > OUT_BATCH(d, i, MI_BATCH_BUFFER_END); > - so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset; > - > + so->aux_size = i * sizeof(u32) - so->aux_offset; > + so->aux_offset += so->batch_offset; > /* > * Since we are sending length, we need to strictly conform to > * all requirements. For Gen2 this must be a multiple of 8. > */ > - so->aux_batch_size = ALIGN(so->aux_batch_size, 8); > + so->aux_size = ALIGN(so->aux_size, 8); > > - kunmap(page); > + if (needs_clflush) > + drm_clflush_virt_range(d, i*sizeof(u32)); Spaces around * Reviewed-by: Joonas Lahtinen <joonas.lahtien@xxxxxxxxxxxxxxx> Horrible patch to review, code motion and little changes in between. Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
