Em Qua, 2016-09-07 às 12:17 -0400, Lyude escreveu:
> I'm not sure that kbl has this either. The kbl machine I've been
> working with thus-far has passed a few modesetting stress tests with
> the chameleon, and I don't have anything trying to control sagv stuff
> on it.
>
> This being said though the sagv for skylake did happen to get added
> right before release and wasn't in any SDPs, so even so we should
> keep
> our eyes out when kbl starts shipping…
I got confirmation from the Hardware guys that KBL does need to run the
SAGV code, and it has the same latency as SKL. Also, all SKL production
steppings need to run the SAGV code.
>
> On Wed, 2016-09-07 at 19:11 +0300, Ville Syrjälä wrote:
> >
> > On Tue, Sep 06, 2016 at 09:52:14PM -0300, Paulo Zanoni wrote:
> > >
> > >
> > > According to BSpec, it's the "core CPUs" that need the code,
> > > which
> > > means SKL and KBL, but not BXT.
> > >
> > > I don't have a KBL to test this patch on it.
> >
> > IIRC bspec doesn't specify the sagv latency for anything but
> > SKL, and the relevant w/a was only listed for SKL as well. So not
> > sure
> > this is correct.
> >
> > >
> > >
> > >
> > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> > > ---
> > > drivers/gpu/drm/i915/intel_pm.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > > b/drivers/gpu/drm/i915/intel_pm.c
> > > index af75011..baacd95 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -2887,7 +2887,7 @@ skl_wm_plane_id(const struct intel_plane
> > > *plane)
> > > static bool
> > > intel_has_sagv(struct drm_i915_private *dev_priv)
> > > {
> > > - return IS_SKYLAKE(dev_priv);
> > > + return IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv);
> > > }
> > >
> > > /*
> > > --
> > > 2.7.4
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
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