On Fri, Sep 09, 2016 at 02:10:54PM +0300, Mika Kahola wrote:
> SW revision is mandatory field for DisplayPort branch
> devices. This is defined in DPCD register fields 0x50A
> and 0x50B.
>
> v2: move drm_dp_ds_revision structure to be part of
> drm_dp_link structure (Daniel)
> v3: remove dependency to drm_dp_helper but instead parse
> DPCD and print SW revision info to dmesg (Ville)
> v4: commit message fix (Jim Bride)
>
> Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
Reviewed-by: Jim Bride <jim.bride@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++++++++
> include/drm/drm_dp_helper.h | 1 +
> 2 files changed, 21 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index bb0417c..7428c72 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1438,6 +1438,25 @@ static void intel_dp_print_hw_revision(struct intel_dp *intel_dp)
> DRM_DEBUG_KMS("sink hw revision: %d.%d\n", (rev & 0xf0) >> 4, rev & 0xf);
> }
>
> +static void intel_dp_print_sw_revision(struct intel_dp *intel_dp)
> +{
> + uint8_t rev[2];
> + int len;
> +
> + if ((drm_debug & DRM_UT_KMS) == 0)
> + return;
> +
> + if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> + DP_DWN_STRM_PORT_PRESENT))
> + return;
> +
> + len = drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_SW_REV, &rev, 2);
> + if (len < 0)
> + return;
> +
> + DRM_DEBUG_KMS("sink sw revision: %d.%d\n", rev[0], rev[1]);
> +}
> +
> static int rate_to_index(int find, const int *rates)
> {
> int i = 0;
> @@ -4332,6 +4351,7 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
> intel_dp_probe_oui(intel_dp);
>
> intel_dp_print_hw_revision(intel_dp);
> + intel_dp_print_sw_revision(intel_dp);
>
> intel_dp_configure_mst(intel_dp);
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 19ac599..215202f 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -447,6 +447,7 @@
> #define DP_BRANCH_OUI 0x500
> #define DP_BRANCH_ID 0x503
> #define DP_BRANCH_HW_REV 0x509
> +#define DP_BRANCH_SW_REV 0x50A
>
> #define DP_SET_POWER 0x600
> # define DP_SET_POWER_D0 0x1
> --
> 2.7.4
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