From: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> i915_slpc_info shows the contents of SLPC shared data parsed into text format. v1: Reformat slpc info (Radek) squashed query task state info in slpc info, kunmap before seq_print (Paulo) return void instead of ignored return value (Paulo) Avoid magic numbers and use local variables (Jon Bloomfield) Removed WARN_ON for checking msb of gtt address of shared gem obj. (ChrisW) Moved definition of power plan and power source to earlier patch in the series. drm/i915/slpc: Allocate/Release/Initialize SLPC shared data (Akash) v2-v3: Rebase. v4: Updated with GuC firmware v9. Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_debugfs.c | 197 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_slpc.c | 19 ++++ drivers/gpu/drm/i915/intel_slpc.h | 1 + 3 files changed, 217 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 4fde685..8e1e83b 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1324,6 +1324,202 @@ static const struct file_operations i915_slpc_dcc_fops = { .llseek = seq_lseek }; +static int i915_slpc_info(struct seq_file *m, void *unused) +{ + struct drm_info_node *node = m->private; + struct drm_device *dev = node->minor->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_gem_object *obj; + struct page *page; + void *pv = NULL; + struct slpc_shared_data data; + struct slpc_task_state_data *task_data; + int i, value; + enum slpc_global_state global_state; + enum slpc_platform_sku platform_sku; + enum slpc_power_plan power_plan; + enum slpc_power_source power_source; + + if (!intel_slpc_active(dev_priv)) + return -ENODEV; + + obj = dev_priv->guc.slpc.vma->obj; + if (obj) { + intel_slpc_query_task_state(dev_priv); + + page = i915_gem_object_get_page(obj, 0); + if (page) + pv = kmap_atomic(page); + } + + if (pv) { + data = *(struct slpc_shared_data *) pv; + kunmap_atomic(pv); + + seq_printf(m, "shared data size: %d\n", data.shared_data_size); + + global_state = (enum slpc_global_state) data.global_state; + seq_printf(m, "global state: %d (", global_state); + switch (global_state) { + case SLPC_GLOBAL_STATE_NOT_RUNNING: + seq_puts(m, "not running)\n"); + break; + case SLPC_GLOBAL_STATE_INITIALIZING: + seq_puts(m, "initializing)\n"); + break; + case SLPC_GLOBAL_STATE_RESETTING: + seq_puts(m, "resetting)\n"); + break; + case SLPC_GLOBAL_STATE_RUNNING: + seq_puts(m, "running)\n"); + break; + case SLPC_GLOBAL_STATE_SHUTTING_DOWN: + seq_puts(m, "shutting down)\n"); + break; + case SLPC_GLOBAL_STATE_ERROR: + seq_puts(m, "error)\n"); + break; + default: + seq_puts(m, "unknown)\n"); + break; + } + + platform_sku = (enum slpc_platform_sku) + data.platform_info.platform_sku; + seq_printf(m, "sku: %d (", platform_sku); + switch (platform_sku) { + case SLPC_PLATFORM_SKU_UNDEFINED: + seq_puts(m, "undefined)\n"); + break; + case SLPC_PLATFORM_SKU_ULX: + seq_puts(m, "ULX)\n"); + break; + case SLPC_PLATFORM_SKU_ULT: + seq_puts(m, "ULT)\n"); + break; + case SLPC_PLATFORM_SKU_T: + seq_puts(m, "T)\n"); + break; + case SLPC_PLATFORM_SKU_MOBL: + seq_puts(m, "Mobile)\n"); + break; + case SLPC_PLATFORM_SKU_DT: + seq_puts(m, "DT)\n"); + break; + case SLPC_PLATFORM_SKU_UNKNOWN: + default: + seq_puts(m, "unknown)\n"); + break; + } + seq_printf(m, "slice count: %d\n", + data.platform_info.slice_count); + + seq_printf(m, "power plan/source: 0x%x\n\tplan:\t", + data.platform_info.power_plan_source); + power_plan = (enum slpc_power_plan) SLPC_POWER_PLAN( + data.platform_info.power_plan_source); + power_source = (enum slpc_power_source) SLPC_POWER_SOURCE( + data.platform_info.power_plan_source); + switch (power_plan) { + case SLPC_POWER_PLAN_UNDEFINED: + seq_puts(m, "undefined"); + break; + case SLPC_POWER_PLAN_BATTERY_SAVER: + seq_puts(m, "battery saver"); + break; + case SLPC_POWER_PLAN_BALANCED: + seq_puts(m, "balanced"); + break; + case SLPC_POWER_PLAN_PERFORMANCE: + seq_puts(m, "performance"); + break; + case SLPC_POWER_PLAN_UNKNOWN: + default: + seq_puts(m, "unknown"); + break; + } + seq_puts(m, "\n\tsource:\t"); + switch (power_source) { + case SLPC_POWER_SOURCE_UNDEFINED: + seq_puts(m, "undefined\n"); + break; + case SLPC_POWER_SOURCE_AC: + seq_puts(m, "AC\n"); + break; + case SLPC_POWER_SOURCE_DC: + seq_puts(m, "DC\n"); + break; + case SLPC_POWER_SOURCE_UNKNOWN: + default: + seq_puts(m, "unknown\n"); + break; + } + + seq_printf(m, "IA frequency (MHz):\n\tP0: %d\n\tP1: %d\n\tPe: %d\n\tPn: %d\n", + data.platform_info.P0_freq * 50, + data.platform_info.P1_freq * 50, + data.platform_info.Pe_freq * 50, + data.platform_info.Pn_freq * 50); + + task_data = &data.task_state_data; + seq_printf(m, "task state data: 0x%08x 0x%08x\n", + task_data->bitfield1, task_data->bitfield2); + + seq_printf(m, "\tgtperf task active: %s\n", + yesno(task_data->gtperf_task_active)); + seq_printf(m, "\tgtperf stall possible: %s\n", + yesno(task_data->gtperf_stall_possible)); + seq_printf(m, "\tgtperf gaming mode: %s\n", + yesno(task_data->gtperf_gaming_mode)); + seq_printf(m, "\tgtperf target fps: %d\n", + task_data->gtperf_target_fps); + + seq_printf(m, "\tdcc task active: %s\n", + yesno(task_data->dcc_task_active)); + seq_printf(m, "\tin dcc: %s\n", + yesno(task_data->in_dcc)); + seq_printf(m, "\tin dct: %s\n", + yesno(task_data->in_dct)); + seq_printf(m, "\tfreq switch active: %d\n", + task_data->freq_switch_active); + + seq_printf(m, "\tibc enabled: %s\n", + yesno(task_data->ibc_enabled)); + seq_printf(m, "\tibc active: %s\n", + yesno(task_data->ibc_active)); + seq_printf(m, "\tpg1 enabled: %s\n", + yesno(task_data->pg1_enabled)); + seq_printf(m, "\tpg1 active: %s\n", + yesno(task_data->pg1_active)); + + seq_printf(m, "\tunslice max freq: %d\n", + task_data->freq_unslice_max); + seq_printf(m, "\tunslice min freq: %d\n", + task_data->freq_unslice_min); + seq_printf(m, "\tslice max freq: %d\n", + task_data->freq_slice_max); + seq_printf(m, "\tslice min freq: %d\n", + task_data->freq_slice_min); + + seq_puts(m, "override parameter bitfield\n"); + for (i = 0; i < SLPC_OVERRIDE_BITFIELD_SIZE; i++) + seq_printf(m, "%d: 0x%08x\n", i, + data.override_parameters_set_bits[i]); + + seq_puts(m, "override parameters (only non-zero shown)\n"); + for (i = 0; i < SLPC_MAX_OVERRIDE_PARAMETERS; i++) { + value = data.override_parameters_values[i]; + if (value) + seq_printf(m, "%d: 0x%8x\n", i, value); + } + + } else { + seq_puts(m, "no SLPC info available\n"); + } + + return 0; +} + static int i915_frequency_info(struct seq_file *m, void *unused) { struct drm_i915_private *dev_priv = node_to_i915(m->private); @@ -5526,6 +5722,7 @@ static const struct drm_info_list i915_debugfs_list[] = { {"i915_guc_info", i915_guc_info, 0}, {"i915_guc_load_status", i915_guc_load_status_info, 0}, {"i915_guc_log_dump", i915_guc_log_dump, 0}, + {"i915_slpc_info", i915_slpc_info, 0}, {"i915_frequency_info", i915_frequency_info, 0}, {"i915_hangcheck_info", i915_hangcheck_info, 0}, {"i915_drpc_info", i915_drpc_info, 0}, diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c index 84b0423..392a048 100644 --- a/drivers/gpu/drm/i915/intel_slpc.c +++ b/drivers/gpu/drm/i915/intel_slpc.c @@ -167,6 +167,25 @@ void intel_slpc_get_param(struct drm_i915_private *dev_priv, } } +static void host2guc_slpc_query_task_state(struct drm_i915_private *dev_priv) +{ + u32 data[4]; + u32 shared_data_gtt_offset = i915_ggtt_offset(dev_priv->guc.slpc.vma); + + data[0] = HOST2GUC_ACTION_SLPC_REQUEST; + data[1] = SLPC_EVENT(SLPC_EVENT_QUERY_TASK_STATE, 2); + data[2] = shared_data_gtt_offset; + data[3] = 0; + + host2guc_slpc(dev_priv, data, 4); +} + +void intel_slpc_query_task_state(struct drm_i915_private *dev_priv) +{ + if (intel_slpc_active(dev_priv)) + host2guc_slpc_query_task_state(dev_priv); +} + static unsigned int slpc_get_platform_sku(struct drm_i915_private *dev_priv) { enum slpc_platform_sku platform_sku; diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h index 3a134e2..cc43194 100644 --- a/drivers/gpu/drm/i915/intel_slpc.h +++ b/drivers/gpu/drm/i915/intel_slpc.h @@ -205,4 +205,5 @@ void intel_slpc_set_param(struct drm_i915_private *dev_priv, void intel_slpc_get_param(struct drm_i915_private *dev_priv, enum slpc_param_id id, int *overriding, u32 *value); +void intel_slpc_query_task_state(struct drm_i915_private *dev_priv); #endif -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx