This will help avoid Host to GuC actions being called till GuC gets loaded during i915_drm_resume. v2-v3: Rebase. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 1f677a9..aeb97ac 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1627,6 +1627,7 @@ static int i915_drm_resume(struct drm_device *dev) static int i915_drm_resume_early(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw; struct pci_dev *pdev = dev_priv->drm.pdev; int ret; @@ -1684,6 +1685,12 @@ static int i915_drm_resume_early(struct drm_device *dev) DRM_ERROR("Resume prepare failed: %d, continuing anyway\n", ret); + /* + * Mark GuC FW load status as PENDING to avoid any Host to GuC actions + * invoked till GuC gets loaded in i915_drm_resume. + */ + guc_fw->guc_fw_load_status = GUC_FIRMWARE_PENDING; + intel_uncore_early_sanitize(dev_priv, true); if (IS_BROXTON(dev_priv)) { -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx