Hey, Op 29-08-16 om 14:35 schreef Kumar, Mahesh: > This patch implements new DDB allocation algorithm as per HW team > suggestion. This algo takecare of scenario where we allocate less DDB > for the planes with lower relative pixel rate, but they require more DDB > to work. > It also takes care of enabling same watermark level for each > plane, for efficient power saving. Patch 2 and 3 look ok, I'm not a watermark expert though. :) To be honest, skylake watermarks are very complicated with all the interdepencies. I can understand this helps, but if you do separate per crtc atomic commits, it doesn't help a update for crtc1 may introduce a vblank wait on crtc2 and the other way around. This will drop the framerate to half. Is there no way around it? ~Maarten _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
