On su, 2016-08-07 at 15:45 +0100, Chris Wilson wrote: > + > + engine->scratch = vma; > + DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08llx\n", > + engine->name, vma->node.start); Not related to this patch; we do seem to have confusion on scratch vs. pipe control terms. > + return 0; > + > +err_unref: > + i915_gem_object_put(obj); > + return ret; > +} > return index; > @@ -993,7 +993,7 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *engine, > > /* WaClearSlmSpaceAtContextSwitch:bdw,chv */ > /* Actual scratch location is at 128 bytes offset */ > - scratch_addr = engine->scratch.gtt_offset + 2*CACHELINE_BYTES; > + scratch_addr = engine->scratch->node.start + 2*CACHELINE_BYTES; Add spaces around * > > wa_ctx_emit(batch, index, GFX_OP_PIPE_CONTROL(6)); > wa_ctx_emit(batch, index, (PIPE_CONTROL_FLUSH_L3 | > @@ -1072,8 +1072,8 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *engine, > /* WaClearSlmSpaceAtContextSwitch:kbl */ > /* Actual scratch location is at 128 bytes offset */ > if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0)) { > - uint32_t scratch_addr > - = engine->scratch.gtt_offset + 2*CACHELINE_BYTES; > + uint32_t scratch_addr = > + engine->scratch->node.start + 2*CACHELINE_BYTES; While correcting formatting; add spaces around * With those two tweaks; Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx