On Mon, 1 Aug 2016, Chris Wilson wrote:
On Fri, Jul 29, 2016 at 10:34:35AM +0100, Peter Antoine wrote:
This change adds a RC6 test for the MOCS. The MOCS registers are loaded
and saved as part of the RC6 cycle but not all the registers are
saved/restored. This tests that those registers are correctly restored.
Signed-off-by: Peter Antoine <peter.antoine@xxxxxxxxx>
---
tests/gem_mocs_settings.c | 56 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/tests/gem_mocs_settings.c b/tests/gem_mocs_settings.c
index 4fb3a02..66d02d9 100644
--- a/tests/gem_mocs_settings.c
+++ b/tests/gem_mocs_settings.c
@@ -518,6 +518,59 @@ static void run_tests(unsigned mode)
intel_register_access_fini();
}
+static unsigned int readit(const char *path)
+{
+ unsigned int ret = 0;
+ int scanned = 0;
+ FILE *file;
+
+ file = fopen(path, "r");
+ igt_assert(file);
+ scanned = fscanf(file, "%u", &ret);
+ igt_assert_eq(scanned, 1);
+
+ fclose(file);
+
+ return ret;
+}
+
+static int read_rc6_residency(void)
+{
+ unsigned int residency;
+ const int device = drm_get_card();
+ static const char path_format[] =
+ "/sys/class/drm/card%d/power/rc6_residency_ms";
+ char path[sizeof(path_format)];
+ int ret;
+
+ ret = snprintf(path, sizeof(path)-1, path_format, device);
+
+ igt_assert_neq(ret, -1);
+ residency = readit(path);
This is duplicating code from igt_sysfs.c
PS: Not in the current tree. The code is based on code from
pm_rc6_residency.
+
+ return residency;
+}
+
+static void context_rc6_test(void)
+{
+ int fd = drm_open_driver(DRIVER_INTEL);
+ int res_ms;
+ uint32_t ctx_id = gem_context_create(fd);
+
+ igt_debug("RC6 Context Test\n");
+ check_control_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+ check_l3cc_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+
+ res_ms = read_rc6_residency();
+ sleep(3);
Still a large and arbitrary delay.
+ igt_assert_neq(res_ms, read_rc6_residency());
Still an assert rather than skipping when the user has disabled rc6.
-Chris
--
Peter Antoine (Android Graphics Driver Software Engineer)
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