On Wed, 14 Dec 2011 13:57:23 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> From: Chris Wilson <chris at chris-wilson.co.uk>
>
> By clearing the GPU read domains before waiting upon the buffer, we run
> the risk of the wait being interrupted and the domains prematurely
> cleared. The next time we attempt to wait upon the buffer (after
> userspace handles the signal), we believe that the buffer is idle and so
> skip the wait.
>
> There are a number of bugs across all generations which show signs of an
> overly haste reuse of active buffers.
I think this patch is better as:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 683ff1e..cb5ff10 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3126,9 +3126,6 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)
{
int ret;
- if ((obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0)
- return 0;
-
if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
ret = i915_gem_flush_ring(obj->ring, 0, obj->base.write_domain);
if (ret)
While I think it was valid other than in this function, the implication
between (read_domains & I915_GEM_GPU_DOMAINS) <-> obj->active is less
clear than just relying on i915_gem_object_wait_rendering()'s use of
obj->active.
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