On Thu, Jul 28, 2016 at 10:11:43AM +0300, Joonas Lahtinen wrote: > On ke, 2016-07-27 at 11:53 +0100, Chris Wilson wrote: > > @@ -1713,9 +1711,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, > > > > /* XXX: RCS is the only one to auto invalidate the TLBs? */ > > if (engine->id != RCS) { > > - ret = engine->emit_flush(req, > > - I915_GEM_GPU_DOMAINS, > > - I915_GEM_GPU_DOMAINS); > > + ret = engine->emit_flush(req, EMIT_INVALIDATE | EMIT_FLUSH); > > Not quite sure why you want to use a combination of flags vs. _BARRIER > at different places? Just trying to express the intent of the code. Since this code is concerned about TLB loading, I though keeping the INVALIDATE explicit was best. Around the MRI we strictly only need a command stream barrier and so used BARRIER for documentation (in fact both of these instances of barriers before the operation can be proven to be not required, as the required barrier is already provided). After the MRI, we can use a slightly different barrier than a pure flush/invalidate which might show a miniscule difference in a purpose built microbenchmark. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx