[PATCH 1/2] drm/i915: Avoid vblank counter for platforms with DMC.

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Framecounter register is read-only so DMC cannot restore it
after exiting DC5 and DC6.

Easiest way to go is to avoid the counter and use vblank
interruptions for this platform and for all the following
ones since DMC came to stay. At least while we can't change
this register to read-write.

v2: drop unecessary vblank_disable_immediate.
    check on DMC/CSR feature instead of gen number.
    add comments.
    change nop function name to make it more clear.
    rebase after a long time.

Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
---
 drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7104dc1..6ae201e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -656,9 +656,9 @@ static void i915_enable_asle_pipestat(struct drm_i915_private *dev_priv)
  *   of horizontal active on the first line of vertical active
  */
 
-static u32 i8xx_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
+static u32 nop_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
 {
-	/* Gen2 doesn't have a hardware frame counter */
+	/* Disabled hardware frame counter */
 	return 0;
 }
 
@@ -4544,9 +4544,15 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 	INIT_DELAYED_WORK(&dev_priv->gpu_error.hangcheck_work,
 			  i915_hangcheck_elapsed);
 
-	if (IS_GEN2(dev_priv)) {
+	if (IS_GEN2(dev_priv) || HAS_CSR(dev_priv)) {
+		/*
+		 * Disable HW frame counters for gen2 where it doens't exit
+		 * and for platforms with DMC firmware, because
+		 * frame counter are read-only registers and DMC cannot
+		 * restore it after exiting DC5/DC6.
+		 */
 		dev->max_vblank_count = 0;
-		dev->driver->get_vblank_counter = i8xx_get_vblank_counter;
+		dev->driver->get_vblank_counter = nop_get_vblank_counter;
 	} else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) {
 		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
 		dev->driver->get_vblank_counter = g4x_get_vblank_counter;
-- 
2.4.3

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