Re: Verilog/ASIC development support is insufficient in git , help!

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Thanks Kevin,

I think i better give svn another serious look . but then, my impression from the rest of the people is that p4 and svn are not the ultimate tools for hardware development either .

I guess we just do not have the perfect tool for asic dev yet .

Justin

Kevin Ballard wrote:
But they come at an expense - no more linear revision numbers, more complex commands, etc. You can't have it both ways.

You could always use a main SVN repo and then use git-svn to maintain your own private git repos, do all the code syncing you want there, and then push it back to SVN when you want to send it back to the main build stream. If you go this route, be careful to maintain a linear history on the branch that tracks the SVN repo, as SVN cannot handle merges the way git can. You'll want to either do rebasing or squashed merges (to avoid multiple parents).

-Kevin Ballard
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