* Xi Ruoyao via Gcc-help: > On Fri, 2022-02-25 at 09:35 +0100, Stefan Ring via Gcc-help wrote: >> On Thu, Feb 24, 2022 at 9:39 PM Satish Vasudeva via Gcc-help >> <gcc-help@xxxxxxxxxxx> wrote: >> > >> > Please let into this intel architecture manual , section 8.1.1 >> > >> > https://cdrdv2.intel.com/v1/dl/getContent/671190 >> > >> > I think Intel claims 16B operations are atomic , unless I am missing >> > something. >> >> Interesting. This seems to be a somewhat recent addition, and the >> mailing list discussion linked to above predates it. Coincidentally, I >> pulled a copy of the Intel manuals at almost exactly the same time as >> this discussion, and sure enough, it does not yet contain the >> paragraph about 16 byte operations. > > It seems an addition in Dec 2021 revision: > https://cdrdv2.intel.com/v1/dl/getContent/671294 > > Create an issue in bugzilla then? Yes please. I should have read the whole thread first. 8-) The AMD manual doesn't say this yet, so any optimization needs to be restricted to Intel CPUs for now. I'll reach out to AMD to get clarification. Thanks, Florian
