Hi, Currently, RISC-V does not support generating traps for floating point exceptions. Quoting from RISC-V Instruction Set Manual > As allowed by the standard, we do not support traps on floating-point > exceptions in > the baseISA, but instead require explicit checks of the flags in software. > Generating traps for floating point exceptions can be useful for debugging. GNU libc function feenableexcept() <http://www.gnu.org/s/hello/manual/libc/Control-Functions.html> enables trapping of the floating-point exceptions, which generates the signal SIGFPE. How can i make RISC-V generate traps for floating point exceptions? Thanks
