I have a Raspberry Pi 3, which is ARMv8. It has CRC, but it lacks
PMULL, AES and SHA. Its also running a Debian-lite/4.4 kernel/ARMHF
image. GCC version is 'g++ (Raspbian 4.9.2-10) 4.9.2'.
>From cpuinfo, I believe the following is mostly optimal, but it fails
to crc32 extensions:
-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=hard
According to GCC's ARM options page
(http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html), CRC requires
-march=armv8-a+crc (or something similar).
My question is, how do I enable crc32 extensions in this configuration?
Thanks in advance.
Jeff
**********
# cat /proc/cpuinfo
processor : 0
model name : ARMv7 Processor rev 4 (v7l)
BogoMIPS : 76.80
Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva
idivt vfpd32 lpae evtstrm crc32
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xd03
CPU revision : 4
...
**********
$ g++ -march=native -dM -E - </dev/null
*** Error in `g++': double free or corruption (top): 0x018ead68 ***
Aborted
$ g++ -mtune=native -dM -E - </dev/null
*** Error in `g++': double free or corruption (top): 0x00278e00 ***
Aborted
$ g++ -dM -E - </dev/null | sort | egrep -i
'(arm|aarch|crc|crypto|neon|feature)'
#define __arm__ 1
#define __ARM_32BIT_STATE 1
#define __ARM_ARCH 6
#define __ARM_ARCH_6__ 1
#define __ARM_ARCH_ISA_ARM 1
#define __ARM_ARCH_ISA_THUMB 1
#define __ARM_EABI__ 1
#define __ARMEL__ 1
#define __ARM_FEATURE_CLZ 1
#define __ARM_FEATURE_DSP 1
#define __ARM_FEATURE_LDREX 4
#define __ARM_FEATURE_QBIT 1
#define __ARM_FEATURE_SAT 1
#define __ARM_FEATURE_SIMD32 1
#define __ARM_FEATURE_UNALIGNED 1
#define __ARM_FP 12
#define __ARM_NEON_FP 4
#define __ARM_PCS_VFP 1
#define __ARM_SIZEOF_MINIMAL_ENUM 4
#define __ARM_SIZEOF_WCHAR_T 32
$ clang++-3.7 -dM -E - </dev/null | sort | egrep -i
'(arm|aarch|crc|crypto|neon|feature)'
#define __arm 1
#define __arm__ 1
#define __ARM_32BIT_STATE 1
#define __ARM_ACLE 200
#define __ARM_ARCH 6
#define __ARM_ARCH_6K__ 1
#define __ARM_ARCH_ISA_ARM 1
#define __ARM_EABI__ 1
#define __ARMEL__ 1
#define __ARM_FEATURE_DSP 1
#define __ARM_FP 0xC
#define __ARM_PCS 1
#define __ARM_PCS_VFP 1
#define __ARM_SIZEOF_MINIMAL_ENUM 4
#define __ARM_SIZEOF_WCHAR_T 4
#define __ARM_VFPV2__ 1
