Hi there, I am trying to under GCC pipeline description by reading its online doc at http://gcc.gnu.org/onlinedocs/gccint/Processor-pipeline-description.html#Processor-pipeline-description. The following example in the online doc confused me: (define_insn_reservation "div" 8 (eq_attr "type" "div") "i1_pipeline, div*7, div + (port0 | port1)") My understanding is that the first cycle will use i1_pipeline unit and the next 7 cycles will use div unit, the 9th cycles will use either "div + port0" or "div + port1" unit. So in sum, this div instruction is going to need 9 cycles, not the 8. Or the "div*7" would be "div*6"? Could some one please help to clarify? Thanks in advance. BR, Terry
