Hi, Can anybody help me to understand why can't gcc optimize the code using SSE and MMX instructions for any given architecture.Why I need to write assembly code to use SSE and MMX instructions? Thanks, Yogesh
Hi, Can anybody help me to understand why can't gcc optimize the code using SSE and MMX instructions for any given architecture.Why I need to write assembly code to use SSE and MMX instructions? Thanks, Yogesh
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