Hi all, I have been working on a MIPS-based platform, which incidently fails to read and write 8bit or 16bit integers, due to a very annoying HW bug. In other words, any assembly instruction like lb, lbu, sb, lh ... turns to be a no-op. A proper manual workaround is to rely on 32bits accesses with proper bit masks, but : * I do not want to patch any existing code using char or short. * I want to prevent gcc from optimizing code chunks like this one : int i = (*(int*)0x1234) & 0xFF; into lb r0, 0x1237 (which it actually does, with -O2 or -Os). I would like to tell gcc not to use lb, lbu ... but lw and sw with proper bit masks. Incidently, I would like to optimize memory accesses when it is possible, e.g. char* a = (char*)0x1234; char c1 = *a; char c2 = *(a+1); should generate only one read at 0x1234 => Is it achievable by changing mips.md ? => If so, could someone give me a hint on how to do it ? => If not, where should I have a look ? Thanks for your help, -- Frederic Heitzmann