Hello, For my engineering degree project I'm extending GCC backend for custom architecture based on OpenRISC. First of all I have to understand how GCC backend works (RTL via machine description to asm transformation). Which machine description is the simplest and the best documented? I'm looking for something to start from. OpenRISC machine description is sometimes "nasty". My first task was to surround few instructions with couple of other instructions - that was easy to do with "define_expand". Now I stuck on three issues: 1. I have to rewrite description for multiplication instruction. Now it takes three 32 bit registers. Modified "mul" descriptions takes three 64 bit numbers, when processors is still 32 bit. Each number is stored in two continuous registers, where second register is used implicitly. Example: we write "mul r3, r9, r11" and actually used registers will be: r3, r4, r9, r10, r11, r12. For "mul r2, r8, r20" used registers are r2, r3, r8, r9, r20, r21. Can you give a hint how to do that? I assume, that I should somehow preserve these implicit registers during one of RTL passes, but I don't know which. I reviewed some API for RTL objects, but I don't know how to deal with this issue. 2. Second task is SIMD add instruction. There's a lot of SIMD instructions in x86 description, but it's too complicated at the beginning. Anything simple to start with? 3. Going back to "define_expand", is there any way to access insn RTX object for which this "define_expand" is called? I want to conditionally insert additional insn after current insn.
