My architecture has a hardware loop implementation which works only if there are no conditional branches in the loop body. We have implemented the doloop_begin and doloop_end RTLs and also the target macro TARGET_INVALID_WITHIN_DOLOOP. The optimization works correctly except that in some cases the basic block reordering pass (and possibly some other passes) reorder the blocks in such a manner that the body of the loop no longer remains as a single basic block or even successive basic blocks that fall through to the next, even though the original code has no branches within the loop body. This makes the final code generation impossible since the doloop specific instructions can no longer be generated. Any suggestions at preventing the basic block reordering happening for such loops? We tried turning off the basic block reorder pass but then some other pass appears to still mess it up. Thanks and regards Ayonam
