Ayonam Ray <ayonam@xxxxxxxxx> writes: > On 27 December 2011 20:53, Ian Lance Taylor <iant@xxxxxxxxxx> wrote: >> Ayonam Ray <ayonam@xxxxxxxxx> writes: >> >>> I'm looking for a target macro or a hook by which I can tell the >>> optimizer that in Base + Index addressing, my hardware scales the >>> Index register by the size of the data being accessed and hence the >>> Index register increments (for subsequent accesses) should be by 1 and >>> not by the size of the data being accessed. >>> >>> Is there something like that or do we have to do something different >>> in the legitimize_address target hook? >> >> This is a fairly common addressing mode supported by a number of >> processors. For a scale factor you should represent the address as >> (plus (reg base) (mult (reg index) (const_int scale))) >> Make sure that your TARGET_LEGITIMATE_ADDRESS_P hook recognizes that >> sort of address, with the appropriate scale factor depending on the >> mode. You shouldn't need to do much else. > > Thanks for the suggestion. I already had something similar in the > TARGET_LEGITIMATE_ADDRESS_P but later realized that I was also > accepting (plus (reg base) (reg index)) as a valid address and that > was the problem. I removed that and now it works. However, I now > find that while it is generating correct addressing, it no longer uses > the base+index addressing. It instead multiplies the loop end > condition by 4, increments the loop counter by 4 and then computes the > base+index(which has now become an offset in a register) first and > then uses a base+offset addressing with offset set to zero. Any > suggestions to where I might be going wrong? Look at the dump file of the combine pass to see why it is not combining the multiplication into the address. Make sure your TARGET_RTX_COSTS reflects the fact that the multiplication is free when used in an address. Ian
