SPARC extended inline assembly and register constraints

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Hi all,

I would appreciate if somebody knows whether there is a way to specify, through the gcc extended inline assembly construct, a precise kind of registers. 
To be more specific, I would like to indicate that the given instruction operand must be a SPARC output register.

e.g.

int var;
asm volatile("instructionname %1" 
    : /* no output */ 
    : "xxx"(var)
    : /* no clobbered regs */
    );

In this case, I would like to find, if existing, the right constraint to use instead of xxx to ask the compiler to pick one of the o0 - o7 registers.

I state beforehand that I have read the related gcc documentation, unfortunately without finding anything related to my question. I think that gcc focuses strictly on the SPARC ABI compliance rather than allowing a wide range of customization to the inline assembly, but I hope I am wrong and there is a possibility to do this trick.

Thank you in advance,

J.



      


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