Am 09.03.2010 19:54, schrieb Thomas Martitz:
Am 09.03.2010 19:36, schrieb Andrew Haley:
That does not surprise me. I think you're seeing a problem that is
caused by something elsewhere in your program. I'm guessing that
there may be a bad prototype or somesuch.
I think you need to strip down your sources until you find something.
Maybe you should try -save-temps and have a look at the actual
preprocessd source. Maybe some bastard has done
#define int long
or something evil like that!
Andrew.
No, I know our codebase pretty well. This is not the problem. Not that
int or long matters, anyway.
In the mean time we found a test case:
----
void foo(int last, char * block);
void bar(void)
{
struct {
char * __attribute__((aligned(8))) member;
} s;
foo(0,s.member);
}
----
compiled with arm-elf-eabi-gcc -c test.c
This example exposes the problem.
We found the problem is related to struct addressing and the aligned
attribute.
- normal stack variables work
- struct members work with __attribute__((aligned(4)))
- struct members with __attribute__((aligned(X))) where X >= 8 *do
not* work.
Look at the assembly output for this very example. block is passed in
r2, while it's supposed to be passed in r1.
Our temporary "fix" is to make it "void foo(int last, volatile char *
block);" [notice the volatile keyword] and it works as well (block
passed in r1).
This is definitely a gcc bug. The generated call is dependent on the
parameter passed. The callee can't know about this. And it also
happens with -O0.
Best regards.
A bit more on this issue.
In the rockbox code, this struct member caused the behavior:
int16_t * ATTR_ALIGN(16) DCTblock; /* put buffer separately to
have it in IRAM */
Actually we don't need the pointer to be 16byte aligned, but the buffer
it points to. Hence, removing the ATTR_ALIGN(16) (a #define for
__attribute__((aligned(X)) ) works for us.
Nevertheless, it is a gcc bug. It seems likely that gcc confuses
something here 64bit values must be 8byte aligned afaik. On ARM EABI,
64bit types need to be passed into an even (and the next odd, e.g. r2
and r3) registers. Maybe now treats all 8+ byte aligned data as 64bit,
which would explain why it wants to put normal 32bit into even
registers, which violates the calling convention.
Best regards.
