Thanks, Andrew.
I still not understand when the insn "insv" in target.md can be used
in the RTL representation of the code.
2009/12/18 Andrew Haley <aph@xxxxxxxxxx>:
> fanqifei wrote:
>> The instruction sequence generated by gcc can be simply rewritten by
>> three instructions.
>> Apparently gcc should find the expression storing to bit-field and use
>> pattern insv. But it didn't.
>>
>> gcc:
>> 10: 3c03fff3 lui v1,0xfff3
>> 14: 3463ffff ori v1,v1,0xffff
>> 18: 8ca20000 lw v0,0(a1)
>> 1c: 3c040008 lui a0,0x8
>> 20: 00431824 and v1,v0,v1
>> 24: 00641825 or v1,v1,a0
>>
>> with ins:
>> lw v0,0(a1)
>> ori a0, $0, 2
>> ins v0,v0,19,18
>
> I can't see anything in gcc that would use an ins instruction to do that.
>
> Andrew.
>
--
Qifei Fan
