On Tue, Oct 6, 2009 at 9:31 AM, Ian Lance Taylor <iant@xxxxxxxxxx> wrote: > "Kim, Eunchan" <helpbygrace@xxxxxxxxx> writes: > >> On Tue, Oct 6, 2009 at 5:10 AM, Ian Lance Taylor <iant@xxxxxxxxxx> wrote: >>> "Kim, Eunchan" <helpbygrace@xxxxxxxxx> writes: >>> >>>> (insn 81 80 0 ../../../../sdk/gcc-4.3.3/libgcc/../gcc/unwind-dw2.c:1503 >>>> (parallel [ >>>> (set (mem:BLK (reg/v/f:SI 43 [ c ]) [0 S4 A8]) >>>> (unspec:BLK [ >>>> (reg:SI 75) >>>> (mem:QI (reg/v/f:SI 43 [ c ]) [0 S1 A8]) >>>> (mem:BLK (reg/v/f:SI 43 [ c ]) [0 S4 A8]) >>>> ] 21)) >>>> (clobber (scratch:SI)) >>>> ]) -1 (nil)) >>> >>> Where did this insn come from? (clobber (scratch:SI)) is something >>> one might see in a reload insn pattern, but it shouldn't be in a >>> normal insn patter. >>> >>> If you are trying to write an insn which does a memory copy and needs >>> a scratch register, then you need to use a define_expand which calls >>> gen_reg_rtx. >>> >>> Ian >>> >> >> That insn is from gcc's error message when i compile >> libgcc(unwind-dw2.c) with this gcc. I based on mips cross compiler. >> But i'd rather make whole new. Because i do not fully understand mips >> target description. > > I don't see any define_insn like that in mips.md. It looks like > mov_<store>r, but that has no (clobber (scratch)) in it. So I think > it is an insn you added or modified. > > Ian > Thank you for replying. When i ported with mips.md, i did not touch any RTL template, i just commented out some RTL, it means whole define_insn structure, and modify the asm outputs. I searched my md file. I could not find any rtl related to (clobber (scratch)). (clobber (scratch)) is in (define_peephole2 and define_expand "<u>mulsidi3") of mips.md which i already commented out. Eunchan
