Hello I am creating a GCC backend for our PLC interpreter. But now I have run into a problem with the movsi3 instruction. Our interpreter understands the following instructions: XLA reg, const_int reg <- const_int COPY reg1, reg2 reg2 <- reg1 XST reg1, reg2 store value in reg1 to memory address in reg2 XLD reg1, reg2 load value at address in reg1 into register reg2 In my MD file I implemented it as follows: (define_memory_constraint "R" "An address that can be used for XST/XLD" (and (match_code "mem") (match_test "GET_CODE (XEXP (op, 0)) == REG")) ) ;; Move Instructions (define_expand "movsi" [(set (match_operand:SI 0 "nonimmediate_operand" "r,r,R,r") (match_operand:SI 1 "general_operand" "r,iF,r,R"))] "" { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) != REG) if (!no_new_pseudos) operands[1] = force_reg (SImode, operands[1]); } ) (define_insn "movsi_regs" [(set (match_operand:SI 0 "register_operand" "=r, r") (match_operand:SI 1 "nonmemory_operand" "r, iF"))] "" "@ COPY %1, %0 XLA %0, %1" [(set_attr "length" "2,2")] ) (define_insn "movsi_load" [(set (match_operand:SI 0 "register_operand" "=r") (match_operand:SI 1 "memory_operand" "R"))] "" "XLD %1, %0" [(set_attr "length" "2")] ) (define_insn "movsi_store" [(set (match_operand:SI 0 "memory_operand" "=R") (match_operand:SI 1 "register_operand" "r"))] "" "XST %1, %0" [(set_attr "length" "2")] ) This code works if I compile exactly one function in a c source file. It will not work if i have something like: extern int a void a2 () { a = a + a; } void aq () { a = a * a; } The output of function aq is not correct. It is missing the XLA instruction. It seems to me that the compiler assumes that the register %1 contains already the address of a. But the code does not work if first function aq and then a2 is called. SUB a2 XLA %1, a ; movsi_regs XLD %1, %0 ; movsi_load ADD %0, %0, %0 ; addsi3/1 XST %0, %1 ; movsi_store ENDSUB SUB aq XLD %1, %0 ; movsi_load MUL %0, %0, %0 ; mulsi3/1 XST %0, %1 ; movsi_store ENDSUB Any ideas? Thank you