Correct inline assembly constraint for X86 sar instruction

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Hi,

The X86 instruction sar accepts only an immediate or the cl register as shift width. The question is how to tell the compiler to use cl instead of ecx/rcx.

I've solved my problem by casting the input parameter to unsigned char in the input constraint:

"Ic"((unsigned char)shift)

(See also: http://linuxtv.org/hg/~tmerle/v4l2-library/rev/660e9b799e4b)

When browsing through the <bits/byteswap.h> header I noticed the following instruction: __asm__ ("rorw $8, %w0"). The 'w' seems to limit the zeroth input parameter to word size. Where is this behavior documented? I looked at
http://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html
but couldn't find something related.

What's the "correct" approach here? Casting or using "sar %b2,%1"?

Thanks,
Gregor

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