Reason behind not implementing some instructions of H8SX targets in H8300 port

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi,
The following instructions of Renesas H8SX targets are not implemented
in H8300 port,

1.Arithmetic instructions such as ADDS, SUBS, INC and DEC.
2.Arithmetic instructions that include operations on FLAG register such
as  
  ADDX and SUBX.
3.Logical instructions that include operations on FLAG register such as
ANDC, 
  ORC and XORC.
4.Bit instructions that include operations on Carry flag such as BIAND,
BIOR,
  BIXOR, BILD and BIST.
5.Branch instruction BSR and its conditional types BSR/BC and BSR/BS.
6.LDC - Load to Control Register.

Does anybody know the reason behind not implementing these instructions
for H8SX targets?

Regards,
Deepen Mantri
KPIT Cummins Infosystems Ltd, Pune


[Index of Archives]     [Linux C Programming]     [Linux Kernel]     [eCos]     [Fedora Development]     [Fedora Announce]     [Autoconf]     [The DWARVES Debugging Tools]     [Yosemite Campsites]     [Yosemite News]     [Linux GCC]

  Powered by Linux