[Bug 1169492] Review Request: abc - Sequential logic synthesis and formal verification

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https://bugzilla.redhat.com/show_bug.cgi?id=1169492



--- Comment #3 from Jerry James <loganjerry@xxxxxxxxx> ---
A very short delay, as it turns out.  Quoting from
http://vlsicad.eecs.umich.edu/BK/SAUCY/

June 2013: in addition to the current saucy implementation, we have developed
an algorithm to find symmetries of Boolean functions represented by (sizable)
circuits. Such functional symmetries may or may not be structural. For example,
the n-input AND function has all possible permutations as its functional
symmetries, but any minimal circuit (a tree) for this function loses most of
those symmetries. Our implementation is being added to the ABC system for
circuit synthesis and verification, developed at Berkeley. The command is
saucy3. The algorithms will be described in a paper at ICCAD 2013.

This code is not the same as the saucy code with the non-free license, and was
given to the ABC project for inclusion, rather than distributed separately. 
Therefore it is both not a copylib, and covered by the ABC license.

Also:
> Did you submit the manpage upstream? (This is a should.)

I have not, but I will today.

New URLs:
Spec URL: https://jjames.fedorapeople.org/abc/abc.spec
SRPM URL:
https://jjames.fedorapeople.org/abc/abc-1.01-2.hg20141130.fc22.src.rpm

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