[Bug 229657] Review Request: iverilog - Icarus Verilg is a verilog compiler, simulator.

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Summary: Review Request: iverilog - Icarus Verilg is a verilog compiler, simulator.


https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=229657


wolfy@xxxxxxxxxxxxxxxxxx changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
         AssignedTo|nobody@xxxxxxxxxxxxxxxxx    |wolfy@xxxxxxxxxxxxxxxxxx
OtherBugsDependingO|177841                      |
              nThis|                            |




------- Additional Comments From wolfy@xxxxxxxxxxxxxxxxxx  2007-02-26 17:06 EST -------
I am removing the NEEDSPONSOR flag and assigning the bug to myself, because
Patrice has agreed to sponsor you.

GOOD:
- rpmlint check comes back empty both on source and binary rpms:
[wolfy@wolfy iverilog]$ rpmlint iverilog-devel-20070123-3.fc6.x86_64.rpm
[wolfy@wolfy iverilog]$ rpmlint iverilog-20070123-3.fc6.x86_64.rpm
[wolfy@wolfy iverilog]$ rpmlint iverilog-20070123-3.fc6.src.rpm
[wolfy@wolfy iverilog]$
- package meets naming guidelines
- package meets packaging guidelines
- license (GPL) OK, text in %doc, matches source
- spec file legible, in am. English
- source matches latest available upstream version, sha1sum 
6b737279fe876e039322a6c31457372073366ec1  verilog-20070123.tar.gz
- package compiles on devel (x86_64), RPM_OPT_FLAGS are used
- no missing BR
- no unnecessary BR
- no locales
- not relocatable
- owns all directories that it creates
- no duplicate files
- permissions are sane
- %clean ok
- macro use consistent
- code, not content
- no need for -docs (there are many small text files, but all of them together
occupy <150K)
- nothing in %doc affects runtime
- not a GUI, so no need for .desktop file

- devel package ok (contains 2 libs and some examples)
- no .la files
- no need for any scriptlets
- devel requires base package n-v-r 

So far everything seems fine, tomorrow I'll test the program (did not have time
for that today) and most probably end the review.

I have noticed that you have not included a couple of the doc files:
attributes.txt,extensions.txt,glossary.txt, ivl_target.txt ivlpp.txt,
iverilog-fpga.man, tgt-vvp/README.txt,  vvp/README.txt, and neither the examples
shipped in the vvp directory. Maybe it would be worth to include all those (with
the examples in the devel package, just like the already included set of examples) ?

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