On Fri, Jul 29, 2016 at 09:34:38AM +0100, Richard W.M. Jones wrote: > In many ways its no different from trusting your hardware. Did you > inspect the EDA tooling that was used to convert your CPU HDL down to > the photomask? Did you even get to see the source HDL for your CPU > (clue: unless you work for <large CPU manufacturer>, no you didn't). Heh, even if you work for <chip manufacturer> it's a bit of a rabbit hole -- and if one thinks Vivado is proprietary and expensive, real EDA tools are several orders of magnitude worse -- in cost, complexity, and [in]stability alike. Incidently, there's no inherent reason why a Xilinx FPGA bitstream file would not be redistributable -- when you buy a "real" license for Vivado, you generally get permission to use anything bundled with it into your design. After all, the resulting bitstream is specific to the Xilinx FPGA you targeted, and to use it you'll need to buy Xilinx silicon, preferably in volume... :) Distributing unencumbered sources is more complicated; You'd have to take care to exclude any nonredistributable bits -- eg pure HDL IP blocks only licensed for use on Xilinx FPGAs. However, Vivado is structured in such a way that makes cleanly separating things relatively simple, and you can write your project files/scripts so that they will pull in all Xilinx-encumbered bits when you hit "go". Anyway, back to the bit mines.. - Solomon -- Solomon Peachy pizza at shaftnet dot org Delray Beach, FL ^^ (email/xmpp) ^^ Quidquid latine dictum sit, altum viditur.
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