Complete hack just for debugging. It isn't intended that mixing and
matching glsl->tgsi->nir vs glsl->nir between shader stages should
actually work.
---
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 2b9a841..317ed79 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -2232,6 +2232,12 @@ setup_output(struct ir3_compile *ctx, nir_variable *out)
unsigned slot = out->data.location;
unsigned comp = 0;
+ // XXX temporary hack for NIR vs and TGSI fs.. since there is
+ // some disagreement about varying slots..
+ if (ctx->so->shader->nir)
+ if (slot >= VARYING_SLOT_VAR0)
+ slot += 9;
+
DBG("; out: slot=%u, len=%ux%u, drvloc=%u",
slot, array_len, ncomp, n);
--
2.5.0
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