The instance of the GPU populated in Freescale i.MX95 does require
release from reset by writing into a single GPUMIX block controller
GPURESET register bit 0. Implement support for this reset register.
Signed-off-by: Marek Vasut <marex@xxxxxxx>
---
Cc: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
Cc: David Airlie <airlied@xxxxxxxxx>
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
Cc: Liviu Dudau <liviu.dudau@xxxxxxx>
Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
Cc: Maxime Ripard <mripard@xxxxxxxxxx>
Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
Cc: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Cc: Sebastian Reichel <sre@xxxxxxxxxx>
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: Simona Vetter <simona@xxxxxxxx>
Cc: Steven Price <steven.price@xxxxxxx>
Cc: Thomas Zimmermann <tzimmermann@xxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx
Cc: imx@xxxxxxxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
---
V2: - Set nr_resets=1 to limit the amount of resets to single bit
- Switch from fsl, to nxp, vendor prefix
- Add RESET_IMX95_GPU Kconfig symbol to select this reset driver
on MX9
---
drivers/reset/Kconfig | 8 ++++++++
drivers/reset/reset-simple.c | 9 +++++++++
2 files changed, 17 insertions(+)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 99f6f9784e686..0b48e76fd0aab 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -249,12 +249,20 @@ config RESET_SIMPLE
- Altera SoCFPGAs
- ASPEED BMC SoCs
- Bitmain BM1880 SoC
+ - NXP i.MX95 GPU
- Realtek SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- SiFive FU740 SoCs
- Sophgo SoCs
+config RESET_IMX95_GPU
+ bool "NXP i.MX95 GPU Reset Driver" if COMPILE_TEST && !SOC_IMX9
+ default SOC_IMX9
+ select RESET_SIMPLE
+ help
+ This enables the reset driver for i.MX95 GPU.
+
config RESET_SOCFPGA
bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
default ARM && ARCH_INTEL_SOCFPGA
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 2760678398308..64aeda8f76b75 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -133,9 +133,18 @@ static const struct reset_simple_devdata reset_simple_active_low = {
.status_active_low = true,
};
+static const struct reset_simple_devdata reset_simple_fsl_imx95_gpu_blk_ctrl = {
+ .reg_offset = 0x8,
+ .active_low = true,
+ .nr_resets = 1,
+ .status_active_low = true,
+};
+
static const struct of_device_id reset_simple_dt_ids[] = {
{ .compatible = "altr,stratix10-rst-mgr",
.data = &reset_simple_socfpga },
+ { .compatible = "nxp,imx95-gpu-blk-ctrl",
+ .data = &reset_simple_fsl_imx95_gpu_blk_ctrl },
{ .compatible = "st,stm32-rcc", },
{ .compatible = "allwinner,sun6i-a31-clock-reset",
.data = &reset_simple_active_low },
--
2.47.2
