Boris,
On 2/27/25 5:30 AM, Boris Brezillon wrote:
On Wed, 26 Feb 2025 15:30:42 -0300
Ariel D'Alessandro <ariel.dalessandro@xxxxxxxxxxxxx> wrote:
Bifrost MMUs support AArch64 4kB granule specification. However,
panfrost only enables MMU in legacy mode, despite the presence of the
HW_FEATURE_AARCH64_MMU feature flag.
This commit adds support to use page tables according to AArch64 4kB
granule specification. This feature is enabled conditionally based on
the GPU model's HW_FEATURE_AARCH64_MMU feature flag.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@xxxxxxxxxxxxx>
---
drivers/gpu/drm/panfrost/panfrost_device.h | 1 +
drivers/gpu/drm/panfrost/panfrost_mmu.c | 118 +++++++++++++++++----
drivers/gpu/drm/panfrost/panfrost_regs.h | 29 +++++
3 files changed, 128 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
index cffcb0ac7c11..dea252f43c58 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.h
+++ b/drivers/gpu/drm/panfrost/panfrost_device.h
@@ -153,6 +153,7 @@ struct panfrost_device {
};
struct panfrost_mmu {
+ void (*enable)(struct panfrost_device *pfdev, struct panfrost_mmu *mmu);
The enable sequence is the same, it's just the transtab, memattr and
transcfg values that differ depending on the format, so let's prepare
them at panfrost_mmu init time, and cache them here.
Agreed. AFAICS, this would be:
Add the following to struct panfrost_mmu:
struct {
u64 transtab;
u64 memattr;
u64 transcfg;
} cfg;
and have it initialized in panfrost_mmu_ctx_create().
For consistency, we should do this for both modes MALI_LPAE and
AARCH64_4K. As for the MALI_LPAE case, I'd move out the initialization
done in drivers/iommu/io-pgtable-arm.c for:
struct {
u64 transtab;
u64 memattr;
} arm_mali_lpae_cfg;
I'll send a proposal for this in the next patchset v1.
Thanks!
--
Ariel D'Alessandro
Software Engineer
Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
Registered in England & Wales, no. 5513718
