This adds support for DSS subsystem present in TI's AM62L SoC which supports single display pipeline with DPI output which is also routed to DSI Tx controller within the SoC. Change Log: V3: - Make generic infra to support truncated K3 DSS IP's - Remove AM62A updates from AM62L DT binding updates V2: - Fix incorrect format of compatible string (comma instead of hyphen) for AM62L SoC - Use separate register space and helper functions for AM62L due to minor differences in register offset/bit position differences for first plane Rangediff: V2->V3: - https://gist.github.com/devarsht/24fa8dd2986861efa431352d19ebbb41 V1->V2 - https://gist.github.com/devarsht/11d47f25ca9fea6976e6284330ddf443 Links to previous versions: V2: https://lore.kernel.org/all/20250204061552.3720261-1-devarsht@xxxxxx/ V1: https://lore.kernel.org/all/20241231090432.3649158-1-devarsht@xxxxxx/ Test logs: https://gist.github.com/devarsht/16fe796b8fd3ea8abf5df8e2327d2311 Devarsh Thakkar (3): dt-bindings: display: ti,am65x-dss: Add support for AM62L DSS drm/tidss: Update infra to support DSS7 cut-down versions drm/tidss: Add support for AM62L display subsystem .../bindings/display/ti/ti,am65x-dss.yaml | 21 +- drivers/gpu/drm/tidss/tidss_crtc.c | 7 +- drivers/gpu/drm/tidss/tidss_dispc.c | 185 +++++++++++++++--- drivers/gpu/drm/tidss/tidss_dispc.h | 12 +- drivers/gpu/drm/tidss/tidss_drv.c | 1 + drivers/gpu/drm/tidss/tidss_irq.c | 6 + drivers/gpu/drm/tidss/tidss_kms.c | 10 +- 7 files changed, 211 insertions(+), 31 deletions(-) -- 2.39.1
